Invention Grant
- Patent Title: Method to modify an integrated circuit (IC) design
- Patent Title (中): 修改集成电路(IC)设计的方法
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Application No.: US12860662Application Date: 2010-08-20
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Publication No.: US08352899B1Publication Date: 2013-01-08
- Inventor: Kian Chin Yap , Phooi Choong Loh , Kar Keng Chua
- Applicant: Kian Chin Yap , Phooi Choong Loh , Kar Keng Chua
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Womble Carlyle Sandridge & Rice, LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method to modify a first IC design into a second IC design, the first and second IC designs specifying a common interconnection layer with a plurality of interconnections, is disclosed. The method includes identifying an interconnection from plurality of interconnections within the common interconnection layer. The interconnection is unused for routing signals in the first IC design. The metal layer that is coupled with the identified interconnection is removed from the first IC design to generate a modified design. The identified interconnection of the first IC design is placed into one of an invisible state or a temporarily removed state in the modified design. The metal layer in the modified design is routed for a specific logic gate design. The modified design is then stored as the second IC design.
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