Invention Grant
US08352902B2 Implementing routing first for rapid prototyping and improved wiring of heterogeneous hierarchical integrated circuits 有权
实现路由优先用于快速原型设计和改进异构分层集成电路的布线

Implementing routing first for rapid prototyping and improved wiring of heterogeneous hierarchical integrated circuits
Abstract:
A method, system and computer program product are provided for implementing routing first for rapid prototyping and improved wiring of heterogeneous hierarchical integrated circuit chips. Placement for each of a plurality of random logic macros (RLMs) is identified. Predefined wiring shapes are created for each of the identified RLMs. Full chip wire routing is defined responsive to the created predefined wiring shapes for each of the identified RLMs.
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