Invention Grant
- Patent Title: Method and device for multi-core instruction-set simulation
- Patent Title (中): 多核指令集仿真的方法和装置
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Application No.: US12588324Application Date: 2009-10-13
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Publication No.: US08352924B2Publication Date: 2013-01-08
- Inventor: Meng-Huan Wu , Cheng-Yang Fu , Peng-Chih Wang , Ren-Song Tsay
- Applicant: Meng-Huan Wu , Cheng-Yang Fu , Peng-Chih Wang , Ren-Song Tsay
- Applicant Address: TW Hsin Chu
- Assignee: National Tsing Hua University
- Current Assignee: National Tsing Hua University
- Current Assignee Address: TW Hsin Chu
- Agency: Bacon & Thomas, PLLC
- Priority: TW98113244A 20090421
- Main IPC: G06F9/45
- IPC: G06F9/45

Abstract:
The present invention discloses a method for multi-core instruction-set simulation. The proposed method identifies the shared data segment and the dependency relationship between the different cores and thus effectively reduces the number of sync points and lowers the synchronization overhead, allowing multi-core instruction-set simulation to be performed more rapidly while ensuring that the simulation results are accurate. In addition, the present invention also discloses a device for multi-core instruction-set simulation.
Public/Granted literature
- US20100269103A1 Method and device for multi-core instruction-set simulation Public/Granted day:2010-10-21
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