发明授权
- 专利标题: Top-side cooled semiconductor package with stacked interconnection plates and method
- 专利标题(中): 顶侧冷却半导体封装,堆叠互连板及方法
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申请号: US12326065申请日: 2008-12-01
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公开(公告)号: US08354740B2公开(公告)日: 2013-01-15
- 发明人: Kai Liu , François Hébert , Lei Shi
- 申请人: Kai Liu , François Hébert , Lei Shi
- 申请人地址: US CA Sunnyvale
- 专利权人: Alpha & Omega Semiconductor, Inc.
- 当前专利权人: Alpha & Omega Semiconductor, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: CH Emily LLC
- 代理商 Chein-Hwa Tsao
- 主分类号: H01L23/495
- IPC分类号: H01L23/495
摘要:
A top-side cooled semiconductor package with stacked interconnection plate is disclosed. The semiconductor package includes a circuit substrate with terminal leads, a semiconductor die atop the circuit substrate, a low thermal resistance intimate interconnection plate for bonding and interconnecting a top contact area of the semiconductor die with the circuit substrate, a low thermal resistance stacked interconnection plate atop the intimate interconnection plate for top-side cooling, a molding encapsulant for encapsulating the package except for exposing a top surface of the stacked interconnection plate to maintain effective top-side cooling. The top portion of the stacked interconnection plate can include a peripheral overhang above the intimate interconnection plate. The peripheral overhang allows for a maximized exposed top surface area for heat dissipation independent of otherwise areal constraints applicable to the intimate interconnection plate. The stacked interconnection plate can be partially etched or three dimensionally formed to create the peripheral overhang.
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