Invention Grant
- Patent Title: Hash function for hardware implementations
- Patent Title (中): 硬件实现的哈希功能
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Application No.: US12612757Application Date: 2009-11-05
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Publication No.: US08359346B2Publication Date: 2013-01-22
- Inventor: Brian C. Grayson , Leick D. Robinson , Benjamin M. Menchaca
- Applicant: Brian C. Grayson , Leick D. Robinson , Benjamin M. Menchaca
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agency: Van Leeuwen & Van Leeuwen
- Agent David Dolezal
- Main IPC: G06F7/00
- IPC: G06F7/00

Abstract:
A logic block is presented that generates avalanche criterion hash values using minimal logic. The logic block includes a first exclusive-OR function, a second exclusive-OR function, and an OR function. The first exclusive-OR function receives two input bits from a data packet and generates a linear output value based upon exclusive disjunction between the two input bits. The OR function receives two different input bits from the data packet and generates a first nonlinear output value based upon logical disjunction between the two different input bits. The second exclusive-OR function receives the linear output value and the first nonlinear output value, and generates a second nonlinear output value based upon exclusive disjunction between the linear output value and the first nonlinear output value. In turn, the second nonlinear output value is utilized to generate a hash value for the data packet.
Public/Granted literature
- US20110106866A1 Hash Function for Hardware Implementations Public/Granted day:2011-05-05
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