Invention Grant
- Patent Title: Method for manufacturing through-silicon via
- Patent Title (中): 硅通孔制造方法
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Application No.: US12962055Application Date: 2010-12-07
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Publication No.: US08367553B2Publication Date: 2013-02-05
- Inventor: Wei-Che Tsao , Wen-Chin Lin
- Applicant: Wei-Che Tsao , Wen-Chin Lin
- Applicant Address: TW Hsinchu
- Assignee: United Microelectronics Corp.
- Current Assignee: United Microelectronics Corp.
- Current Assignee Address: TW Hsinchu
- Agent Ding Yu Tan
- Main IPC: H01L21/306
- IPC: H01L21/306

Abstract:
A method for manufacturing TSVs comprises following steps: A stack structure having a substrate, an ILD layer and a dielectric stop layer is provided, in which an opening penetrating through the ILD layer and the dialectic stop layer and further extending into the substrate is formed. After an insulator layer and a metal barrier are formed on the stack structure, a top metal layer is formed on the stack structure to fulfill the opening. A first planarization process stopping on the metal barrier is conducted, wherein the first planarization process has a polishing rate for removing the metal barrier less than that for removing the top metal layer. A second planarization process stopping on the dielectric stop layer is conducted, wherein the second planarization process has a polishing rate for removing the insulator layer greater than that for removing the dielectric stop layer. The dielectric stop layer is than removed.
Public/Granted literature
- US20120142190A1 METHOD FOR MANUFACTURING THROUGH-SILICON VIA Public/Granted day:2012-06-07
Information query
IPC分类: