Invention Grant
- Patent Title: Clock generator and delta-sigma modulater thereof
- Patent Title (中): 时钟发生器及其Δ-Σ调制器
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Application No.: US13041437Application Date: 2011-03-07
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Publication No.: US08369476B2Publication Date: 2013-02-05
- Inventor: Wei-Sheng Tseng , Hong-Yi Huang , Kuo-Hsing Cheng , Yuan-Hua Chu
- Applicant: Wei-Sheng Tseng , Hong-Yi Huang , Kuo-Hsing Cheng , Yuan-Hua Chu
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW97151134A 20081226
- Main IPC: H03K21/00
- IPC: H03K21/00 ; H03K23/00

Abstract:
A clock generator is illustrated. The clock generator mentioned above includes a multimodulus frequency divider and a delta-sigma modulator. The multimodulus frequency divider is archived by switching the phase thereof. The multimodulus frequency divider increases the operating frequency of the clock generator effectively, and has a characteristic with half period resolution for reducing the jitter of an output clock signal when its spectrum is spread. Besides, the delta-sigma modulator increases the accuracy of the triangle modulation and reduces error of quantization by adding a few components therein. Thus, the clock generator could be expanded to a programmable clock generator.
Public/Granted literature
- US20110150168A1 CLOCK GENERATOR AND DETA-SIGMA MODULATER THEREOF Public/Granted day:2011-06-23
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