发明授权
US08373209B2 Semiconductor device having D mode JFET and E mode JFET and method for manufacturing the same
有权
具有D型JFET和E型JFET的半导体器件及其制造方法
- 专利标题: Semiconductor device having D mode JFET and E mode JFET and method for manufacturing the same
- 专利标题(中): 具有D型JFET和E型JFET的半导体器件及其制造方法
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申请号: US12974516申请日: 2010-12-21
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公开(公告)号: US08373209B2公开(公告)日: 2013-02-12
- 发明人: Rajesh Kumar Malhan , Naohiro Sugiyama
- 申请人: Rajesh Kumar Malhan , Naohiro Sugiyama
- 申请人地址: JP Kariya
- 专利权人: DENSO CORPORATION
- 当前专利权人: DENSO CORPORATION
- 当前专利权人地址: JP Kariya
- 代理机构: Posz Law Group, PLC
- 优先权: JP2009-294801 20091225
- 主分类号: H01L29/12
- IPC分类号: H01L29/12
摘要:
A semiconductor device includes: a substrate; and depletion and enhancement mode JFETs. The depletion mode JFET includes: a concavity on the substrate; a channel layer in the concavity; a first gate region on the channel layer; first source and drain regions on respective sides of the first gate region in the channel layer; first gate, source and drain electrodes. The enhancement mode JFET includes: a convexity on the substrate; the channel layer on the convexity; a second gate region on the channel layer; second source and drain regions on respective sides of the second gate region in the channel layer; second gate, source and drain electrodes. A thickness of the channel layer in the concavity is larger than a thickness of the channel layer on the convexity.
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