发明授权
- 专利标题: Logic circuit
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申请号: US13116372申请日: 2011-05-26
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公开(公告)号: US08373443B2公开(公告)日: 2013-02-12
- 发明人: Jun Koyama , Kengo Akimoto , Masashi Tsubuku
- 申请人: Jun Koyama , Kengo Akimoto , Masashi Tsubuku
- 申请人地址: JP Atsugi-shi, Kanagawa-ken
- 专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人: Semiconductor Energy Laboratory Co., Ltd.
- 当前专利权人地址: JP Atsugi-shi, Kanagawa-ken
- 代理机构: Robinson Intellectual Property Law Office, P.C.
- 代理商 Eric J. Robinson
- 优先权: JP2008-281647 20081031
- 主分类号: H03K19/20
- IPC分类号: H03K19/20 ; H03K19/094
摘要:
An object is to apply a transistor using an oxide semiconductor to a logic circuit including an enhancement transistor. The logic circuit includes a depletion transistor 101 and an enhancement transistor 102. The transistors 101 and 102 each include a gate electrode, a gate insulating layer, a first oxide semiconductor layer, a second oxide semiconductor layer, a source electrode, and a drain electrode. The transistor 102 includes a reduction prevention layer provided over a region in the first oxide semiconductor layer between the source electrode and the drain electrode.
公开/授权文献
- US20110221475A1 LOGIC CIRCUIT 公开/授权日:2011-09-15
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