发明授权
- 专利标题: Semiconductor structure having test and transistor structures
- 专利标题(中): 具有测试和晶体管结构的半导体结构
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申请号: US13599573申请日: 2012-08-30
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公开(公告)号: US08378424B2公开(公告)日: 2013-02-19
- 发明人: Abhishek Dube , Viorel Ontalus , Kathryn T. Schonenberg , Zhengmao Zhu
- 申请人: Abhishek Dube , Viorel Ontalus , Kathryn T. Schonenberg , Zhengmao Zhu
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Hoffman Warnick LLC
- 代理商 Katherine S. Brown
- 主分类号: H01L29/66
- IPC分类号: H01L29/66
摘要:
A semiconductor substrate having transistor structures and test structures with spacing between the transistor structures smaller than the spacing between the test structures is provided. A first iteratively performed deposition and etch process includes: depositing a first doped epitaxial layer having a first concentration of a dopant over the semiconductor substrate, and etching the first doped epitaxial layer. A second iteratively performed deposition and etch process includes: depositing a second doped epitaxial layer having a second concentration of the dopant higher than the first concentration over the semiconductor substrate, and etching the second doped epitaxial layer. The first concentration results in a first net growth rate over the transistor structures and the second concentration results in a lower, second net growth rate over the test structures than the transistor structures, resulting in reduced pattern loading.