Invention Grant
- Patent Title: 5V tolerant circuit for CML transceiver in AC-couple
- Patent Title (中): 交流耦合中CML收发器的5V耐受电路
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Application No.: US12829087Application Date: 2010-07-01
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Publication No.: US08378714B2Publication Date: 2013-02-19
- Inventor: Xu Liang , Lei Kai , Bi Han
- Applicant: Xu Liang , Lei Kai , Bi Han
- Applicant Address: US CA San Jose
- Assignee: Integrated Device Technology, Inc.
- Current Assignee: Integrated Device Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Hayes and Boone LLP
- Main IPC: H03K19/094
- IPC: H03K19/094

Abstract:
A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their substrate coupled to ground, and their source coupled to the input/output pad. Also provided is a circuit to isolate the output of a transmitter from high voltages, including a first transistor and a second transistor. Also provided is a substrate isolating circuit, including a first transistor, a second transistor, and a third transistor so that the substrate voltage is isolated from a high voltage in the pads. Further provided is a bias isolating circuit so that an input bias voltage is isolated from a high voltage in the pads.
Public/Granted literature
- US20120001671A1 5V TOLERANT CIRCUIT FOR CML TRANSCEIVER IN AC-COUPLE Public/Granted day:2012-01-05
Information query
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