Invention Grant
- Patent Title: Semiconductor device and method for manufacturing same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US13052334Application Date: 2011-03-21
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Publication No.: US08384197B2Publication Date: 2013-02-26
- Inventor: Toshimi Nakamura
- Applicant: Toshimi Nakamura
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Turocy & Watson, LLP
- Priority: JP2010-82963 20100331
- Main IPC: H01L27/118
- IPC: H01L27/118 ; H01L23/544 ; H01L21/00

Abstract:
According to one embodiment, a semiconductor device includes a semiconductor substrate, an inter-layer insulating film, a wiring, and a via. The inter-layer insulating film is provided on the semiconductor substrate. The wiring is provided in the inter-layer insulating film. The via is provided in the inter-layer insulating film. Inside the inter-layer insulating film in a circumferential region around a device region, a vertical structure body is formed in which the wiring and the via are vertically connected. At least in an upper portion inside the inter-layer insulating film in an edge region located around the circumferential region and constituting an outer edge portion, no vertical structure body is formed in which the wiring and the via are vertically connected.
Public/Granted literature
- US20110241164A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2011-10-06
Information query
IPC分类: