Invention Grant
- Patent Title: Integrated circuit packaging system with cavity and method of manufacture thereof
- Patent Title (中): 具有空腔的集成电路封装系统及其制造方法
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Application No.: US12582582Application Date: 2009-10-20
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Publication No.: US08390110B2Publication Date: 2013-03-05
- Inventor: Sang-Ho Lee , Taewoo Lee , Soo-San Park
- Applicant: Sang-Ho Lee , Taewoo Lee , Soo-San Park
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Agent Mikio Ishimaru
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A method of manufacture of an integrated circuit packaging system includes: mounting a substrate-less integrated circuit package, having a terminal having characteristics of an intermetallic compound, over a substrate; connecting the substrate and the substrate-less integrated circuit package; and forming a base encapsulation over the substrate-less integrated circuit package with the terminal exposed.
Public/Granted literature
- US20110089554A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAVITY AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2011-04-21
Information query
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