发明授权
- 专利标题: Delay configurable device and methods thereof
- 专利标题(中): 延迟可配置设备及其方法
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申请号: US11435917申请日: 2006-05-17
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公开(公告)号: US08390354B2公开(公告)日: 2013-03-05
- 发明人: Nitin Vig , Arnab K. Mitra
- 申请人: Nitin Vig , Arnab K. Mitra
- 申请人地址: US TX Austin
- 专利权人: Freescale Semiconductor, Inc.
- 当前专利权人: Freescale Semiconductor, Inc.
- 当前专利权人地址: US TX Austin
- 主分类号: H03K3/289
- IPC分类号: H03K3/289
摘要:
A device and associated method to reduce hold-time violations are disclosed. The device includes a latch module with a selectable delay. The latch module includes a control input to select the delay through the latch. In one embodiment, the delay of the latch is the time between when a latching edge of a clock signal is experienced by the latch until data changes at the output of the latch. In the event of a hold-time violation at latches that are downstream of other latches, a longer delay can be selected at an upstream latch to provide a slower delay path for data provided to the downstream latch violating the hold-time. By providing a slower delay path, the data being latched at the downstream latch will not change as quickly after a latching signal is received, and therefore the possibility of a hold-time violation is reduced.
公开/授权文献
- US20070268053A1 Delay configurable device and methods thereof 公开/授权日:2007-11-22
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