发明授权
- 专利标题: Router design for 3D network-on-chip
- 专利标题(中): 路由器设计用于3D网络片上
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申请号: US12751811申请日: 2010-03-31
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公开(公告)号: US08391281B2公开(公告)日: 2013-03-05
- 发明人: Bipul C. Paul
- 申请人: Bipul C. Paul
- 申请人地址: US CA San Jose
- 专利权人: Toshiba America Research, Inc.
- 当前专利权人: Toshiba America Research, Inc.
- 当前专利权人地址: US CA San Jose
- 代理机构: Westerman, Hattori, Daniels & Adrian, LLP
- 主分类号: H04L12/50
- IPC分类号: H04L12/50
摘要:
A network-on-chip router which includes an input buffer, an input controller connected to said input buffer, an arbiter connected to said input controller, a crossbar connected to said arbiter and said input buffer, and an output buffer connected to said crossbar. The network-on-chip router minimizes propagation time of data through the router by ensuring that the propagation delay of data through an input buffer is less than the combined propagation delay of data through an input controller and arbiter.
公开/授权文献
- US20110243147A1 ROUTER DESIGN FOR 3D NETWORK-ON-CHIP 公开/授权日:2011-10-06
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