Invention Grant
US08391415B2 Electronic device, integrated circuit and method for selecting of an optimal sampling clock phase 有权
电子设备,集成电路和选择最佳采样时钟相位的方法

Electronic device, integrated circuit and method for selecting of an optimal sampling clock phase
Abstract:
An electronic device comprises a number of sub-systems coupled via an interface. One of the number of sub-systems comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern, operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation.
Information query
Patent Agency Ranking
0/0