In the case in which an input voltage to a comparator COMP reaches (½)×Vcc from initial Vcc in accordance with lowering of the electric potential at a nodal point N1, an output level of the comparator COMP is inverted to make the output level LOW. In the case in which the output level of the comparator COMP is made LOW, a switch for amplifying part SW3 is connected, and an optical receiver circuit 1 makes the shift to a half start-up state. A signal detector circuit SD as well is started up by the connection of the switch for amplifying part SW3. In the case in which an amplifying part 2 is started up, the signal detector circuit SD judges whether a transmission signal is included in an output from the amplifying part 2. In the case in which the signal detector circuit SD shows that a transmission signal is not included, the resetting switch SW2 is connected to reset a capacitor C1.