Invention Grant
US08397029B2 System and method for cache coherency in a multiprocessor system
有权
多处理器系统中高速缓存一致性的系统和方法
- Patent Title: System and method for cache coherency in a multiprocessor system
- Patent Title (中): 多处理器系统中高速缓存一致性的系统和方法
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Application No.: US11959793Application Date: 2007-12-19
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Publication No.: US08397029B2Publication Date: 2013-03-12
- Inventor: Richard Nicholas , Jason Alan Cox , Robert John Dorsey , Hien Minh Le , Eric Francis Robinson , Thuong Quang Truong
- Applicant: Richard Nicholas , Jason Alan Cox , Robert John Dorsey , Hien Minh Le , Eric Francis Robinson , Thuong Quang Truong
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: The Caldwell Firm, LLC
- Agent Patrick E. Caldwell, Esq.
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A method for maintaining cache coherency operates in a data processing system with a system memory and a plurality of processing units (PUs), each PU having a cache, and each PU coupled to at least another one of the plurality of PUs. A first PU receives a first data block for storage in a first cache of the first PU. The first PU stores the first data block in the first cache. The first PU assigns a first coherency state and a first tag to the first data block, wherein the first coherency state is one of a plurality of coherency states that indicate whether the first PU has accessed the first data block. The plurality of coherency states further indicate whether, in the event the first PU has not accessed the first data block, the first PU received the first data block from a neighboring PU.
Public/Granted literature
- US20090164735A1 System and Method for Cache Coherency In A Multiprocessor System Public/Granted day:2009-06-25
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