发明授权
US08400845B2 Column address strobe write latency (CWL) calibration in a memory system
有权
存储器系统中的列地址选通写延迟（CWL）校准
- 专利标题： Column address strobe write latency (CWL) calibration in a memory system
- 专利标题（中）： 存储器系统中的列地址选通写延迟（CWL）校准
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申请号： US12985481申请日： 2011-01-06
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公开(公告)号： US08400845B2公开(公告)日： 2013-03-19
- 发明人: Lydia M. Do , William M. Zevin
- 申请人： Lydia M. Do , William M. Zevin
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Cantor Colburn LLP
- 主分类号： G11C7/10
- IPC分类号： G11C7/10
摘要：
Column address strobe write latency (CWL) calibration including a method for calibrating a memory system. The method includes entering a test mode at a memory device and measuring a CWL at the memory device. A difference between the measured CWL and a programmed CWL is calculated. The calculated difference is transmitted to a memory controller that uses the calculated difference for adjusting a timing delay to match the measured CWL.
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