Invention Grant
- Patent Title: Patterned wafer defect inspection system and method
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Application No.: US11888827Application Date: 2007-08-02
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Publication No.: US08401272B2Publication Date: 2013-03-19
- Inventor: Ajharali Amanullah , Lin Jing , Chunlin Luke Zeng
- Applicant: Ajharali Amanullah , Lin Jing , Chunlin Luke Zeng
- Applicant Address: SG Singapore
- Assignee: ASTI Holdings Limited
- Current Assignee: ASTI Holdings Limited
- Current Assignee Address: SG Singapore
- Agency: Jackson Walker L.L.P.
- Agent Christopher J. Rourk
- Main IPC: G06K9/00
- IPC: G06K9/00

Abstract:
A system for inspecting semiconductor devices is provided. The system includes a region system selecting a plurality of regions from a semiconductor wafer. A golden template system generates a region golden template for each region, such as to allow a die image to be compared to golden templates from a plurality of regions. A group golden template system generates a plurality of group golden templates from the region golden templates, such as to allow the die image to be compared to golden templates from a plurality of group golden templates.
Public/Granted literature
- US20090034831A1 Patterned wafer defect inspection system and method Public/Granted day:2009-02-05
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