Invention Grant
- Patent Title: Semiconductor package including a stacking element
- Patent Title (中): 包括堆叠元件的半导体封装
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Application No.: US12874144Application Date: 2010-09-01
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Publication No.: US08405213B2Publication Date: 2013-03-26
- Inventor: Chia-Ching Chen , Yi-Chuan Ding
- Applicant: Chia-Ching Chen , Yi-Chuan Ding
- Applicant Address: TW Kaohsiung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Kaohsiung
- Agency: Foley & Lardner LLP
- Priority: TW99108423A 20100322
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/50
Abstract:
A semiconductor package includes a set of stud bumps, which can be formed by wire bonding technology and can be bonded or joined to a semiconductor element to form a stacked package assembly. Since the process of bonding the semiconductor element to the stud bumps can be carried out without reflow, an undesirable deformation resulting from high temperatures can be controlled or reduced.
Public/Granted literature
- US20110227220A1 STACKABLE SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2011-09-22
Information query
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