发明授权
US08407021B2 Delay analysis device, delay analysis method, and delay analysis program 有权
延迟分析装置,延迟分析方法和延迟分析程序

  • 专利标题: Delay analysis device, delay analysis method, and delay analysis program
  • 专利标题(中): 延迟分析装置,延迟分析方法和延迟分析程序
  • 申请号: US12893362
    申请日: 2010-09-29
  • 公开(公告)号: US08407021B2
    公开(公告)日: 2013-03-26
  • 发明人: Noriyuki Ito
  • 申请人: Noriyuki Ito
  • 申请人地址: JP Kawasaki
  • 专利权人: Fujitsu Limited
  • 当前专利权人: Fujitsu Limited
  • 当前专利权人地址: JP Kawasaki
  • 代理机构: Staas & Halsey LLP
  • 优先权: JP2009-231728 20091005
  • 主分类号: G06F19/00
  • IPC分类号: G06F19/00
Delay analysis device, delay analysis method, and delay analysis program
摘要:
A delay analysis device includes an acquisition section that acquires circuit information relating to a path through which signal propagation can be delayed, a determination section that sets up an assumed fault for each of pins disposed in the path, and determines whether a signal change output from a beginning latch can be propagated to an ending latch for each of pins for which the assumed faults are set up, and an analysis section that calculates a delay distribution by accumulating delay distributions expressed by probability density functions of delays that occur in individual delay elements included in the path determined that a signal change output from the beginning latch can be propagated to the ending latch, and by not accumulating the delay distributions at a pin through which it has been determined that the signal change cannot be propagated to the ending latch based on the acquired circuit information.
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