发明授权
- 专利标题: Semiconductor integrated communication circuit and operation method thereof
- 专利标题(中): 半导体集成通信电路及其操作方法
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申请号: US12955865申请日: 2010-11-29
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公开(公告)号: US08411730B2公开(公告)日: 2013-04-02
- 发明人: Koji Maeda , Taizo Yamawaki , Yukinori Akamine
- 申请人: Koji Maeda , Taizo Yamawaki , Yukinori Akamine
- 申请人地址: JP Kawasaki-shi
- 专利权人: Renesas Electronics Corporation
- 当前专利权人: Renesas Electronics Corporation
- 当前专利权人地址: JP Kawasaki-shi
- 代理机构: Miles & Stockbridge P.C.
- 优先权: JP2009-271117 20091130
- 主分类号: H04B1/38
- IPC分类号: H04B1/38
摘要:
The semiconductor integrated communication circuit includes:a low-noise amplifier; a receive mixer; a receive VCO; a demodulation-processing circuit; a modulation-processing circuit; a transmit mixer; a transmit VCO; a second-order-distortion-characteristic-calibration circuit; a quadrature-receive-signal-calibration circuit; and a test-signal generator. The test-signal generator generates first and second test signals using the transmit VCO. In the second-order-distortion-characteristic-calibration mode, the second-order-distortion-characteristic-calibration circuit variably changes an operation parameter of the receive mixer thereby to calibrate the second-order distortion characteristic to achieve its best condition while the first test signal is supplied to the receive mixer. In the quadrature-receive-signal-calibration mode, the quadrature-receive-signal-calibration circuit calibrates IQ mismatch of a quadrature receive signal to achieve the best condition thereof while the second test signal is supplied to the receive mixer. The integrated communication circuit can minimize the increase in chip footprint of a test-signal-generating circuit used to perform calibrations of both the second-order characteristic and IQ mismatch.