Invention Grant
- Patent Title: Printed circuit board layout method
- Patent Title (中): 印刷电路板布局方法
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Application No.: US12329614Application Date: 2008-12-07
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Publication No.: US08418357B2Publication Date: 2013-04-16
- Inventor: Yung-Chieh Chen , Cheng-Shien Li , Shou-Kuo Hsu
- Applicant: Yung-Chieh Chen , Cheng-Shien Li , Shou-Kuo Hsu
- Applicant Address: TW New Taipei
- Assignee: Hon Hai Precision Industry Co., Ltd.
- Current Assignee: Hon Hai Precision Industry Co., Ltd.
- Current Assignee Address: TW New Taipei
- Agency: Altis Law Group, Inc.
- Priority: CN200810302746 20080715
- Main IPC: H05K3/30
- IPC: H05K3/30 ; H01R43/00

Abstract:
A printed circuit board layout method includes the following steps. Providing a printed circuit board with a first layout layer and a second layout layer. Disposing a pair of first conducting portions on the first layout layer to electrically couple to a control chip. Sequentially disposing a pair of second conducting portions, a pair of third conducting portions, and a pair of fourth conducting portions on the second layout layer. Providing a pair of connecting portions to connect the first conducting portions and the third conducting portions. Electrically connecting an electronic device to the second conducting portions, and providing a first and second components are coupled with the third and fourth conducting portions, or electrically coupling the electronic device to the fourth conducting portions, and providing the first and the second components are coupled with the second and third conducting portions.
Public/Granted literature
- US20100012363A1 PRINTED CIRCUIT BOARD AND LAYOUT METHOD THEREOF Public/Granted day:2010-01-21
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