A thin film transistor (TFT) substrate includes gate lines, data lines intersecting with the gate lines, a plurality of TFTs, pixel electrodes, and a common electrode insulating the gate lines, the data lines, the TFTs, and the pixel electrode. Each pixel electrode is connected to one of the gate lines and one of the data lines via one of the TFTs. A layer stack including an insulating layer and a passivation layer is sandwiched between the pixel electrodes and the common electrode.