Invention Grant
- Patent Title: Method and apparatus for reducing interference
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Application No.: US12650543Application Date: 2009-12-31
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Publication No.: US08421529B2Publication Date: 2013-04-16
- Inventor: David R. Welland , Donald A. Kerth , Caiyi Wang
- Applicant: David R. Welland , Donald A. Kerth , Caiyi Wang
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Law Offices of Maximilian R. Peterson
- Main IPC: H03K5/00
- IPC: H03K5/00

Abstract:
A method and apparatus is provided for reducing interference in circuits. A management strategy is provided to reduce reference spurs and interference in circuits. The management strategy uses a combination of one or more techniques which reduce the digital current, minimize mutual inductance, utilize field cancellation, prevent leakage current, and/or manage impedance. These techniques may be used alone, or preferably, used on combination with one another.
Public/Granted literature
- US20100102858A1 METHOD AND APPARATUS FOR REDUCING INTERFERENCE Public/Granted day:2010-04-29
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