发明授权
US08423946B1 Circuitry having programmable power rails, architectures, apparatuses, and systems including the same, and methods and algorithms for programming and/or configuring power rails in an integrated circuit
有权
具有可编程电源轨的电路，包括其的系统，设备和系统以及用于在集成电路中编程和/或配置电源轨的方法和算法
- 专利标题： Circuitry having programmable power rails, architectures, apparatuses, and systems including the same, and methods and algorithms for programming and/or configuring power rails in an integrated circuit
- 专利标题（中）： 具有可编程电源轨的电路，包括其的系统，设备和系统以及用于在集成电路中编程和/或配置电源轨的方法和算法
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申请号： US13111435申请日： 2011-05-19
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公开(公告)号： US08423946B1公开(公告)日： 2013-04-16
- 发明人: Jianwen Jin , Eugene Ye
- 申请人： Jianwen Jin , Eugene Ye
- 申请人地址： BM Hamilton
- 专利权人： Marvell International Ltd.
- 当前专利权人： Marvell International Ltd.
- 当前专利权人地址： BM Hamilton
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
Circuits, architectures, a system and methods for providing multiple power rails to a plurality of standard cells in a region of an integrated circuit. The circuitry generally includes a plurality of cells configured for connection to a first or second power rail, the first power rail providing a first voltage to at least one of the plurality of cells, and the second power rail providing a second voltage (which may be independent from the first voltage) to remaining cells in the plurality of cells. The method generally includes routing, in an IC layout, a first power rail providing a first voltage and a second power rail providing a second voltage, placing the plurality of cells, and selectively connecting first and second subsets of the plurality of cells to the first and second power rails, respectively. The present invention further advantageously minimizes regional layout design considerations and time delays.
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