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US08432032B2 Chip package and fabrication method thereof 有权
芯片封装及其制造方法

Chip package and fabrication method thereof
摘要:
A chip package and a fabrication method thereof are provided. The chip package includes a semiconductor substrate, having a first surface and an opposite second surface. A through hole is formed on the first surface, extending from the first surface to the second surface. A conductive trace layer is formed on the first surface and in the through hole. A buffer plug is formed in the through hole and a protection layer is formed over the first surface and in the through hole.
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