Invention Grant
- Patent Title: Bias potential generating circuit
- Patent Title (中): 偏置电位发生电路
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Application No.: US12909162Application Date: 2010-10-21
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Publication No.: US08432194B2Publication Date: 2013-04-30
- Inventor: Tsuguto Maruko , Kouhei Tanaka
- Applicant: Tsuguto Maruko , Kouhei Tanaka
- Applicant Address: JP Tokyo
- Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Volentine & Whitt, PLLC
- Priority: JP2009-243512 20091022
- Main IPC: H03B28/00
- IPC: H03B28/00

Abstract:
A bias potential generating circuit includes a clock supply circuit that generates a clock signal having a predetermined frequency; a rising sine wave generating circuit that generates a rising wave form signal having a wave form of a rising portion of a sine wave; a ΔΣ conversion circuit that generates a pulse width modulation signal by pulse width modulating the rising wave form signal; a first resistor, one end connected to a reference potential input terminal of an operational amplifier; a second resistor, one end connected to the first resistor and to the reference potential input terminal of the operational amplifier, and the other end being grounded; and a switch connected to a power supply and to the other end of the first resistor, the switch being turned ON and OFF by the pulse width modulation signal.
Public/Granted literature
- US20110095793A1 BIAS POTENTIAL GENERATING CIRCUIT Public/Granted day:2011-04-28
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