发明授权
- 专利标题: Invalid write prevention for STT-MRAM array
- 专利标题(中): STT-MRAM阵列无效写入预防
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申请号: US12769995申请日: 2010-04-29
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公开(公告)号: US08432727B2公开(公告)日: 2013-04-30
- 发明人: Kyungho Ryu , Jisu Kim , Seong-Ook Jung , Seung H. Kang
- 申请人: Kyungho Ryu , Jisu Kim , Seong-Ook Jung , Seung H. Kang
- 申请人地址: US CA San Diego KR Seoul
- 专利权人: QUALCOMM Incorporated,Industry-Academic Cooperation Foundation, Yonsei
- 当前专利权人: QUALCOMM Incorporated,Industry-Academic Cooperation Foundation, Yonsei
- 当前专利权人地址: US CA San Diego KR Seoul
- 代理商 Sam Talpalatsky; Nicholas J. Pauley; Joseph Agusta
- 主分类号: G11C11/00
- IPC分类号: G11C11/00
摘要:
In a Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) a bit cell array can have a source line substantially parallel to a word line. The source line can be substantially perpendicular to bit lines. A source line control unit includes a common source line driver and a source line selector configured to select individual ones of the source lines. The source line driver and source line selector can be coupled in multiplexed relation. A bit line control unit includes a common bit line driver and a bit line selector in multiplexed relation. The bit line control unit includes a positive channel metal oxide semiconductor (PMOS) element coupled between the common source line driver and bit line select lines and bit lines.
公开/授权文献
- US20110267874A1 Invalid Write Prevention for STT-MRAM Array 公开/授权日:2011-11-03
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