Invention Grant
- Patent Title: Scalable two-stage virtual output queuing switch and method of operation
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Application No.: US10036809Application Date: 2001-12-31
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Publication No.: US08432927B2Publication Date: 2013-04-30
- Inventor: Ge Nong
- Applicant: Ge Nong
- Applicant Address: HK Kowloon
- Assignee: STMicroelectronics Ltd.
- Current Assignee: STMicroelectronics Ltd.
- Current Assignee Address: HK Kowloon
- Agency: Munck Wilson Mandala, LLP
- Main IPC: H04L12/56
- IPC: H04L12/56

Abstract:
A fixed-size data packet switch comprising: 1) N input ports for receiving incoming fixed-size data packets at a first data rate and outputting the fixed-size data packets at the first data rate; 2) N output ports for receiving fixed-size data packets at the first data rate and outputting the fixed-size data packets at the first data rate; and 3) a switch fabric interconnecting the N input ports and the N output ports. The switch fabric comprises: a) N input buffers for receiving incoming fixed-size data packets at the first data rate and outputting the fixed-size data packets at a second data rate equal to at least twice the first data rate; b) N output buffers for receiving fixed-size data packets at the second data rate and outputting the fixed-size data packets at the first data rate; and c) a bufferless, non-blocking interconnecting network for receiving from the N input buffers the fixed-size data packets at the second data rate and transferring the fixed-size data packets to the N output buffers at the second data rate.
Public/Granted literature
- US20030123469A1 Scalable two-stage virtual output queuing switch and method of operation Public/Granted day:2003-07-03
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