发明授权
- 专利标题： Stacked structure of semiconductor packages including through-silicon via and inter-package connector, and method of fabricating the same
- 专利标题（中）： 包括贯穿硅通孔和封装间连接器的半导体封装的堆叠结构及其制造方法
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申请号： US12900968申请日： 2010-10-08
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公开(公告)号： US08436455B2公开(公告)日： 2013-05-07
- 发明人: Hyung-Lae Eun
- 申请人： Hyung-Lae Eun
- 申请人地址： KR Suwon-Si, Gyeonggi-Do
- 专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人： Samsung Electronics Co., Ltd.
- 当前专利权人地址： KR Suwon-Si, Gyeonggi-Do
- 代理机构： F. Chau & Associates, LLC
- 优先权： KR10-2009-0118035 20091201
- 主分类号： H01L23/02
- IPC分类号： H01L23/02
摘要：
A stacked structure of semiconductor packages includes an upper semiconductor package, a lower semiconductor package and inter-package connectors. The upper semiconductor package includes an upper package substrate, a plurality of upper semiconductor chips stacked on the upper package substrate, and conductive upper connection lands formed on a bottom surface of the upper package substrate. The lower semiconductor package includes a lower package substrate, a plurality of lower semiconductor chips stacked on the lower package substrate, and lower through-silicon vias vertically penetrating the lower semiconductor chips. The inter-package connectors may electrically connect the through-silicon vias to the upper connection lands.
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