- 专利标题: Schemes for forming barrier layers for copper in interconnect structures
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申请号: US13551500申请日: 2012-07-17
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公开(公告)号: US08440564B2公开(公告)日: 2013-05-14
- 发明人: Chen-Hua Yu , Hai-Ching Chen , Tien-I Bao
- 申请人: Chen-Hua Yu , Hai-Ching Chen , Tien-I Bao
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 代理机构: Slater & Matsil, L.L.P.
- 主分类号: H01L21/44
- IPC分类号: H01L21/44
摘要:
A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-based chemical to form a barrier layer on the conductive wiring. A lining barrier layer is formed in the opening for embedding the conductive wiring. The lining barrier layer may comprise same materials as the barrier layer, and the lining barrier layer may be recessed before forming the barrier layer and may contain a metal that can be silicided.
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