发明授权
- 专利标题: Thin-film transistor, display device, and manufacturing method for thin-film transistors
- 专利标题(中): 薄膜晶体管,显示装置和薄膜晶体管的制造方法
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申请号: US13383077申请日: 2010-07-08
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公开(公告)号: US08441016B2公开(公告)日: 2013-05-14
- 发明人: Tsuyoshi Inoue , Tohru Okabe , Tetsuya Aita , Michiko Takei , Yoshiyuki Harumoto , Takeshi Yaneda
- 申请人: Tsuyoshi Inoue , Tohru Okabe , Tetsuya Aita , Michiko Takei , Yoshiyuki Harumoto , Takeshi Yaneda
- 申请人地址: JP Osaka
- 专利权人: Sharp Kabushiki Kaisha
- 当前专利权人: Sharp Kabushiki Kaisha
- 当前专利权人地址: JP Osaka
- 代理机构: Chen Yoshimura LLP
- 优先权: JP2009-166005 20090714
- 国际申请: PCT/JP2010/061606 WO 20100708
- 国际公布: WO2011/007711 WO 20110120
- 主分类号: H01L33/08
- IPC分类号: H01L33/08
摘要:
Disclosed is a high-quality, efficiently manufacturable thin film transistor in which leakage current is minimized. The thin film transistor is provided with a semiconductor layer (34) that contains a channel region (34C) having a microcrystalline semiconductor; source and drain contact layers (35S and 35D) that contains impurities; a first source metal layer (36S) and a first drain metal layer (36D), and a second source metal layer (37S) and a second drain metal layer (37D). The end portion of the second metal source layer (37S) is located at a position receded from the end portion of the first metal source layer (36S) and the end portion of the second drain metal layer (37D) is located at a position receded from the end portion of the first drain metal layer (36D). The semiconductor layer (34) contains low concentration impurity diffusion regions formed near the end portions of the aforementioned source contact layer (35S) and drain contact layer (35D).
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