Invention Grant
- Patent Title: Coreless substrate having filled via pad and method of manufacturing the same
- Patent Title (中): 具有填充通孔垫的无芯衬底及其制造方法
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Application No.: US12320284Application Date: 2009-01-22
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Publication No.: US08445790B2Publication Date: 2013-05-21
- Inventor: Seok Kyu Lee , Soon Oh Jung , Jong Kuk Hong , Soon Jin Cho
- Applicant: Seok Kyu Lee , Soon Oh Jung , Jong Kuk Hong , Soon Jin Cho
- Applicant Address: KR Suwon
- Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee: Samsung Electro-Mechanics Co., Ltd.
- Current Assignee Address: KR Suwon
- Priority: KR10-2008-0102626 20081020
- Main IPC: H05K1/11
- IPC: H05K1/11
Abstract:
Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.
Public/Granted literature
- US20100096177A1 Coreless substrate having filled via pad and method of manufacturing the same Public/Granted day:2010-04-22
Information query
