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US08458426B2 Transceiver with latency alignment circuitry 有权
具有延迟对准电路的收发器

Transceiver with latency alignment circuitry
摘要:
In a transceiver system a first interface receives data from a first channel using a first clock signal and transmits data to the first channel using a second clock signal. A second interface receives data from a second channel using a third clock signal and transmits data to the second channel using a fourth clock signal. A re-timer re-times data received from the first channel using the first clock signal and retransmits the data to the second channel using the fourth clock signal.
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