Invention Grant
US08458556B2 Low complexity finite precision decoders and apparatus for LDPC codes
有权
低复杂度有限精度解码器和LDPC码装置
- Patent Title: Low complexity finite precision decoders and apparatus for LDPC codes
- Patent Title (中): 低复杂度有限精度解码器和LDPC码装置
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Application No.: US12900584Application Date: 2010-10-08
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Publication No.: US08458556B2Publication Date: 2013-06-04
- Inventor: Shiva K. Planjery , Shashi Kiran Chilappagari , Bane Vasic , David Declercq
- Applicant: Shiva K. Planjery , Shashi Kiran Chilappagari , Bane Vasic , David Declercq
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics, SA
- Current Assignee: STMicroelectronics, SA
- Current Assignee Address: FR Montrouge
- Agency: Hogan Lovells US LLP
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
In this invention, a new class of finite precision multilevel decoders for low-density parity-check (LDPC) codes is presented. These decoders are much lower in complexity compared to the standard belief propagation (BP) decoder. Messages utilized by these decoders are quantized to certain levels based on the number of bits allowed for representation in hardware. A message update function specifically defined as part of the invention, is used to determine the outgoing message at the variable node, and the simple min operation along with modulo 2 sum of signs is used at the check node. A general methodology is provided to obtain the multilevel decoders, which is based on reducing failures due to trapping sets and improving the guaranteed error-correction capability of a code. Hence these decoders improve the iterative decoding process on finite length graphs and have the potential to outperform the standard floating-point BP decoder in the error floor region. The description and apparatus of 3-bit decoders for column-weight three LDPC codes is also presented.
Public/Granted literature
- US20110087946A1 LOW COMPLEXITY FINITE PRECISION DECODERS AND APPARATUS FOR LDPC CODES Public/Granted day:2011-04-14
Information query
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