Invention Grant
- Patent Title: Semiconductor device having multi-thickness gate dielectric
- Patent Title (中): 具有多层栅极电介质的半导体器件
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Application No.: US12721045Application Date: 2010-03-10
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Publication No.: US08461647B2Publication Date: 2013-06-11
- Inventor: Hsueh-Liang Chou , Ruey-Hsin Liu , Chih-Wen Yao , Hsiao-Chin Tuan
- Applicant: Hsueh-Liang Chou , Ruey-Hsin Liu , Chih-Wen Yao , Hsiao-Chin Tuan
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/66
- IPC: H01L29/66
Abstract:
A semiconductor device is provided that, in an embodiment, is in the form of a high voltage MOS (HVMOS) device. The device includes a semiconductor substrate and a gate structure formed on the semiconductor substrate. The gate structure includes a gate dielectric which has a first portion with a first thickness and a second portion with a second thickness. The second thickness is greater than the first thickness. A gate electrode is disposed on the first and second portion. In an embodiment, a drift region underlies the second portion of the gate dielectric. A method of fabricating the same is also provided.
Public/Granted literature
- US20110220995A1 Semiconductor Device Having Multi-Thickness Gate Dielectric Public/Granted day:2011-09-15
Information query
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