发明授权
- 专利标题: System and method for EEPROM architecture
- 专利标题(中): EEPROM架构的系统和方法
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申请号: US12959229申请日: 2010-12-02
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公开(公告)号: US08470669B2公开(公告)日: 2013-06-25
- 发明人: Yipeng Jan , Zhen Yang , Shenghe Huang
- 申请人: Yipeng Jan , Zhen Yang , Shenghe Huang
- 申请人地址: CN Shanghai CN Beijing
- 专利权人: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- 当前专利权人: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- 当前专利权人地址: CN Shanghai CN Beijing
- 代理机构: Kilpatrick Townsend & Stockton LLP
- 优先权: CN200910199991 20091204
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
A method for manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) device includes providing a substrate and forming a gate oxide over the substrate. Also, the method includes providing a mask overlying the gate oxide layer, the mask defining a tunnel opening. The method additionally includes performing selective etching over the mask to form a tunnel oxide layer. The method includes forming a floating gate over the tunnel oxide layer and a selective gate over the gate oxide layer. The method includes angle doping a region of the substrate using the floating gate as a mask to obtain a first doped region. The method further includes forming a dielectric layer over the floating gate and a control gate over the dielectric layer. The method additionally includes angle doping a second region of the substrate using the selective gate as a mask to obtain a second doped region, wherein the first and second doped regions partially overlap.
公开/授权文献
- US20110133264A1 SYSTEM AND METHOD FOR EEPROM ARCHITECTURE 公开/授权日:2011-06-09