发明授权
- 专利标题： Method of making semiconductor package with improved standoff
- 专利标题（中）： 制造具有改进间隔的半导体封装的方法
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申请号： US13004028申请日： 2011-01-11
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公开(公告)号： US08481369B2公开(公告)日： 2013-07-09
- 发明人: Junhua Luo , Xingshou Pang , Jinzhong Yao
- 申请人： Junhua Luo , Xingshou Pang , Jinzhong Yao
- 申请人地址： US TX Austin
- 专利权人： Freescale Semiconductor, Inc.
- 当前专利权人： Freescale Semiconductor, Inc.
- 当前专利权人地址： US TX Austin
- 代理商 Charles Bergere
- 优先权： CN201010141754 20100204
- 主分类号： H01L21/56
- IPC分类号： H01L21/56
摘要：
A no-lead type semiconductor package is formed by attaching a die to a top surface of a flag of a lead frame and then taping a bottom surface of the flag and leads of the lead frame. Die bonding pads are connected to the leads with wires and then the assembly is put in a mold chase and encapsulated with a plastic material. The mold chase has protrusions between the flag and the leads of a lead frame, and between the leads themselves, which causes indentations to be formed between the leads and between the flag and the leads. The method is particularly useful for making quad flat no lead (QFN) devices and power-QFN type devices.
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