An integrated circuit 2 is provided with a first power supply conductor 8 coupled via header transistors 14 to 26 to a second power supply conductor 10. Logic circuitry 4, 6 draws its power supply from the second power supply conductor. When switching from a sleep mode to an operating mode the header transistors 14 to 26 are divided into a plurality of sets of transistors which are switched on in a predetermined sequence using controller circuitry 28. The controller circuitry 28 senses the voltage of the second power supply conductor 10 to determine when each set of header transistors should be switched on. In this way, the in-rush current within the integrated circuit 2 associated with the switch from the sleep state to the operating state can be held within a predetermined range of a target in-rush current.