Invention Grant
US08487407B2 Low impedance gate control method and apparatus 有权
低阻门控制方法及装置

Low impedance gate control method and apparatus
Abstract:
According to one embodiment of a module, the module includes a plurality of gate driver chips coupled in parallel and having a common gate input, a common supply voltage and a common output. The chips are spaced apart from one another and have a combined width extending between an edge of a first outer one of the chips and an opposing edge of a second outer one of the chips. The module further includes a plurality of capacitors coupled in parallel between ground and the common supply voltage, and a transverse electromagnetic (TEM) transmission line medium coupled to the common output of the chips and having a current flow direction perpendicular to the combined width of the chips.
Public/Granted literature
Information query
Patent Agency Ranking
0/0