Invention Grant
- Patent Title: Low impedance gate control method and apparatus
- Patent Title (中): 低阻门控制方法及装置
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Application No.: US13272741Application Date: 2011-10-13
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Publication No.: US08487407B2Publication Date: 2013-07-16
- Inventor: Reinhold Bayerer , Daniel Domes
- Applicant: Reinhold Bayerer , Daniel Domes
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L23/48 ; H01L23/52 ; H03K17/72

Abstract:
According to one embodiment of a module, the module includes a plurality of gate driver chips coupled in parallel and having a common gate input, a common supply voltage and a common output. The chips are spaced apart from one another and have a combined width extending between an edge of a first outer one of the chips and an opposing edge of a second outer one of the chips. The module further includes a plurality of capacitors coupled in parallel between ground and the common supply voltage, and a transverse electromagnetic (TEM) transmission line medium coupled to the common output of the chips and having a current flow direction perpendicular to the combined width of the chips.
Public/Granted literature
- US20130093046A1 LOW IMPEDANCE GATE CONTROL METHOD AND APPARATUS Public/Granted day:2013-04-18
Information query
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