发明授权
US08487652B2 Adjustable interface buffer circuit between a programmable logic device and a dedicated device
有权
可编程逻辑器件与专用器件之间的可调接口缓冲电路
- 专利标题: Adjustable interface buffer circuit between a programmable logic device and a dedicated device
- 专利标题(中): 可编程逻辑器件与专用器件之间的可调接口缓冲电路
-
申请号: US13212522申请日: 2011-08-18
-
公开(公告)号: US08487652B2公开(公告)日: 2013-07-16
- 发明人: Ket-Chong Yap , Senani Gunaratna , Wilma Waiman Shiao
- 申请人: Ket-Chong Yap , Senani Gunaratna , Wilma Waiman Shiao
- 申请人地址: US CA Sunnyvale
- 专利权人: QuickLogic Corporation
- 当前专利权人: QuickLogic Corporation
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Silicon Valley Patent Group LLP
- 主分类号: H03K19/173
- IPC分类号: H03K19/173
摘要:
An integrated circuit includes a programmable logic device, a dedicated device, and an interface circuit between the two. The interface circuit can be easily modified to accommodate the different interface I/O demands of various dedicated devices that may be embedded into the integrated circuit. In one embodiment, the interface circuit may be implemented using a plurality of mask programmable uni-directional interface buffer circuits. The direction of any desired number of the interface buffer circuits can be reversed based on the needs of a desired dedicated device by re-routing the conductors in the interface buffer circuits in a single metal layer of the integrated circuit. In another embodiment, the interface circuit may be implemented using a hardware configurable bi-directional interface buffer circuit.
公开/授权文献
信息查询
IPC分类: