发明授权
- 专利标题: Method for buffering clock skew by using a logical effort
- 专利标题(中): 通过使用逻辑努力缓冲时钟偏移的方法
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申请号: US13155523申请日: 2011-06-08
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公开(公告)号: US08487684B2公开(公告)日: 2013-07-16
- 发明人: Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
- 申请人: Chung-Ying Hsieh , Ming-Hung Chang , Wei Hwang
- 申请人地址: TW Hsinchu
- 专利权人: National Chiao Tung University
- 当前专利权人: National Chiao Tung University
- 当前专利权人地址: TW Hsinchu
- 代理机构: Edwards Wildman Palmer LLP
- 代理商 Peter F. Corless; Steven M. Jensen
- 优先权: TW99146856A 20101230
- 主分类号: G06F1/04
- IPC分类号: G06F1/04 ; H03K3/00
摘要:
A method buffers clock skew by using a logical effort, and is applicable to a clock tree that stays in a strong-inversion region, a moderate-inversion region, or a weak-inversion region. The method includes establishing in the clock tree a temperature sensor and a tunable-width buffer, and establishing width and temperature comparative lists according to a logical effort equation, for the tunable-width buffer to be individually applied to the strong-inversion region, the moderate-inversion region, and the weak-inversion region; selecting one from the width and temperature comparative lists that corresponds to one of the inversion regions in which the clock tree stays, enabling the temperature sensor to sense a temperature, and searching the selected width and temperature comparative list for a width that corresponds to the temperature sensed by the temperature sensor; and enabling the tunable-width buffer to perform a width modulation process according to the searched width.
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