Invention Grant
- Patent Title: Output buffer circuit and method for avoiding voltage overshoot
- Patent Title (中): 输出缓冲电路及避免电压过冲的方法
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Application No.: US12750671Application Date: 2010-03-30
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Publication No.: US08487687B2Publication Date: 2013-07-16
- Inventor: Xie-Ren Hsu , Ji-Ting Chen
- Applicant: Xie-Ren Hsu , Ji-Ting Chen
- Applicant Address: TW Hsinchu Science Park, Hsin-Chu
- Assignee: NOVATEK Microelectronics Corp.
- Current Assignee: NOVATEK Microelectronics Corp.
- Current Assignee Address: TW Hsinchu Science Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Priority: TW99102238A 20100127
- Main IPC: H03K5/08
- IPC: H03K5/08 ; H03F3/45

Abstract:
An output buffer circuit for avoiding voltage overshoot includes an input stage, an output bias circuit, an output stage, a clamp circuit, and a control unit. The input stage includes a positive input terminal, for receiving an input voltage, and a negative input terminal. The input stage generates a current signal according to the input voltage. The output bias circuit is coupled to the input stage, for generating a dynamic bias according to the current signal. The output stage is coupled to the input stage and the output bias circuit, including an output terminal, reversely coupled to the positive input terminal, and at least one output transistor, coupled to the output bias circuit and the output terminal, for providing a driving current to the output terminal according to the dynamic bias to generate an output voltage.
Public/Granted literature
- US20110181336A1 Output Buffer Circuit and Method for Avoiding Voltage Overshoot Public/Granted day:2011-07-28
Information query
IPC分类: