Invention Grant
- Patent Title: Supply voltage generating circuit
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Application No.: US12052422Application Date: 2008-03-20
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Publication No.: US08493132B2Publication Date: 2013-07-23
- Inventor: Koichiro Hayashi , Hitoshi Tanaka
- Applicant: Koichiro Hayashi , Hitoshi Tanaka
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2007-081754 20070327
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
A supply voltage generating circuit that enables a reduction in chip area includes: a booster for outputting a boosted voltage upon generating the boosted voltage by charge pumping of a capacitor element; a power-supply step-down unit for stepping down voltage of an external power supply to a voltage within a breakdown-voltage range of the capacitor element, and applying the stepped-down voltage to the power supply of the booster; and a switch element for switching between application of the external power supply to the power supply of the booster directly or via the power-supply step-down unit. The booster comprises multiple stages of booster circuits. The thicknesses of gate oxide films of capacitor elements constituted by MOS transistors included in respective ones of the booster circuits are the same and are made smaller than the thickness of a gate oxide film of a MOS transistor included in a load circuit having the output of the booster at its power supply.
Public/Granted literature
- US20080238536A1 SUPPLY VOLTAGE GENERATING CIRCUIT Public/Granted day:2008-10-02
Information query
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