发明授权
- 专利标题： Memory cell array latchup prevention
- 专利标题（中）： 存储单元阵列闭锁预防
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申请号： US13280937申请日： 2011-10-25
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公开(公告)号： US08493804B2公开(公告)日： 2013-07-23
- 发明人: Ravindra M. Kapre , Shahin Sharifzadeh
- 申请人： Ravindra M. Kapre , Shahin Sharifzadeh
- 申请人地址： US CA San Jose
- 专利权人： Cypress Semiconductor Corporation
- 当前专利权人： Cypress Semiconductor Corporation
- 当前专利权人地址： US CA San Jose
- 主分类号： G11C7/02
- IPC分类号： G11C7/02
摘要：
An embodiment includes configuring a current-limiting device to place along a power-supply bus to limit current through a first complimentary-metal-oxide semiconductor (CMOS) circuit coupled to the power-supply bus so that current does not exceed a trigger current level of a pnpn diode in a second CMOS circuit coupled to the power bus.
公开/授权文献
- US20130135954A1 MEMORY CELL ARRAY LATCHUP PREVENTION 公开/授权日：2013-05-30
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