发明授权
- 专利标题: Reception circuit
- 专利标题(中): 接收电路
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申请号: US13310773申请日: 2011-12-04
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公开(公告)号: US08494103B2公开(公告)日: 2013-07-23
- 发明人: Takayuki Shibasaki
- 申请人: Takayuki Shibasaki
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Fujitsu Patent Center
- 优先权: JP2010-271775 20101206
- 主分类号: H04L7/00
- IPC分类号: H04L7/00
摘要:
A reception circuit includes: a sampling circuit to sample an input data signal based on a clock signal and output a sampled signal; a data interpolation circuit to interpolate the sampled signal based on phase information corresponding to the sampled signal and output an interpolated data signal; an interpolation error decision circuit to output an interpolation error based on the sampled signal and the phase information; a decision/equalization circuit to equalize the interpolated data signal using an equalization coefficient set based on the interpolation error, to check an equalized interpolated data signal and to output a checked signal; and a phase detection circuit to generate the phase information based on at least one of the checked signal and the equalized interpolated data signal and output the phase information to the data interpolation circuit and the interpolation error decision circuit.
公开/授权文献
- US20120140811A1 RECEPTION CIRCUIT 公开/授权日:2012-06-07
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