发明授权
- 专利标题: Multi-stage pipeline for cache access
- 专利标题(中): 用于缓存访问的多级流水线
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申请号: US13357787申请日: 2012-01-25
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公开(公告)号: US08499123B1公开(公告)日: 2013-07-30
- 发明人: Tarek Rohana , Gil Stoler
- 申请人: Tarek Rohana , Gil Stoler
- 申请人地址: IL Yokneam
- 专利权人: Marvell Israel (M.I.S.L) Ltd.
- 当前专利权人: Marvell Israel (M.I.S.L) Ltd.
- 当前专利权人地址: IL Yokneam
- 主分类号: G06F13/00
- IPC分类号: G06F13/00
摘要:
Embodiments of the present disclosure provide a command processing pipeline operatively coupled to an N-way cache and configured to process a sequence of cache commands. A way of the N ways of the cache with which an address of a cache command matches is a hit way for the cache command in case the cache command is a hit. In one embodiment, the command processing pipeline may be configured to receive a first cache command from one of the plurality of processing cores, select a way, from the N ways, as a potential eviction way, and generate, based at least in part on the received first cache command, N selection signals corresponding to the N ways, wherein each selection signal is indicative of whether the corresponding way is (A). the hit way and/or the eviction way, or (B). neither the hit way nor the eviction way.
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